Simplicity is the Ultimate Sophistication
- Leonardo Da Vinci
Emulation of Neural Networks on Neuromorphic Hardware
Project description

Simulation of the activity of neuronal populations composed of hundreds to thousands of neurons is carried out routinely on software platforms. However, these simulations are extremely slow and far from real-time when the model complexity and/or the number of neurons increases, seriously limiting the applications of such models. One current alternative to overcome this scalability issue is to implement these software models on neuromorphic hardware allowing to run large-scale neural models in real-time independently of the model complexity.


Development of such neuromorphic hardware using highly programmable FPGA (Field Programmable Gate Arrays) is part of on going research has shown great promise in terms of configurability and flexibility. While such hardware exists, it is still very challenging to directly access and configure this hardware from a user stand point. For instance real-time data acquisition and visualization are key to exploit real-time hardware but are currently lacking. In addition, currently one needs expertise with hardware design to be able to use neuromorphic tools, there by limiting access to such state-of-the-art hardware. This project aims to alleviate these limitations and bridge the gap between computational neuro-science and neuromorphic engineering.


Objective

In this project we propose to design and develop a set of Python based software tools as part of a software library pyNCS allowing to map software neural models onto real-time neuromorphic hardware. Students will initially use the open-source Brian neural simulator to study basics of Spiking Neural Networks. Then they will design several python based functions/modules allowing the implementation of various spiking network ``topologies". Further software tools will then be developed in order to map the model parameters onto a state-of-the-art \ac{FPGA} based neuromorphic system.


Resources Provided

Integrated Systems Neuroengineering Lab (ISNL) led by Gert Cauwenberghs will provide access to several FPGA development boards, and state-of-the-art neuromorphic technologies necessary for this project. Students will be co-supervised by a postdoctoral fellow (Sadique Sheik) and an assistant project scientist (Frederic Broccard), and will also receive support from grad students developing the neuromorphic hardware. In addition, Prof. Gert Cauwenberghs will help guide the project.


Introductory Study Material

A broad overview and historical origins of spiking neural networks and time line, read this paper.


For a good survey of different classes of neural models, we recommend reading chapters 1, 2 and 5 of the Neuronal Dynamics book available online.


You can then explore BRIAN by first reading this paper that will give you an overview of the simulator (the access should be free).


There are also two main tutorials available on the BRIAN website:


- Tutorial 1 has 7 parts (a-g) and goes from single neuron to networks: http://www.briansimulator.org/docs/tutorial1_basic_concepts.html


- Tutorial 2 is more about the way of connecting neurons: http://www.briansimulator.org/docs/tutorial2_connections.html


Finally, here's a good general reference for starting learning the Python language: http://pymbook.readthedocs.io/en/latest/


Note that you can easily go through the BRIAN tutorials without any prior Python knowledge.


Hardware Interface Development

We will be developing the interface and tools for an FPGA based simulation platform that is being currently developed in the lab. The low level drivers necessary to interface with the hardware will first be developed in python. A user friendly interface will be driven by pyNCS at the top level, which intern uses the developed drivers. An introduction to pyNCS can be found in the paper found here. The corresponding software library can be found on github.


pyNCS provides an API (a defined set of functions with a given syntax) which govern how the drivers are to be written in order for it to access neuromorphic hardware. As part of this project we will develop our drivers to be consistent with this API and will then use pyNCS as a means of accessing our hardware and describing neural networks at a more abstract level of Populations and Connections.